As a technique to compensate for waveform distortion which may be caused during signal transmission in wireless or wired communications, frequency domain equalization (FDE) is known. The frequency domain equalization (FDE) uses a fast Fourier transform (FFT), which is one of the most important digital signal processing methods.
The frequency domain equalization (FDE) performs a fast Fourier transform (FFT) on time-domain signal data to convert it into frequency-domain data, filters the data for equalization, and then performs an inverse fast Fourier transform (IFFT) to reconvert the data into a time-domain signal. As a result, the frequency domain equalization (FDE) can compensate for distortion in a signal waveform.
Cooley-Tukey butterfly computation is known as an efficient FFT/IFFT processing method (NPT 1). However, because the Cooley-Tukey FFT/IFFT uses a large number of points requiring a complex circuit, the prime factor method is typically used for decomposition into two smaller FFTs/IFFTs for processing (NPT 2). However, if all the processing as in NPT 2 is to be implemented with a circuit, the circuit would be huge in size. Thus, in practice, the FFT processing is achieved by implementing only a part of the required processing with a circuit depending on the desired performance and by using the circuit repetitively.
A pipelined circuit system is also known to implement the FFT processing. The pipelined circuit system is characterized by the ability to achieve a high throughput (processing performance per unit time) by handling the individual internal processes constituting the FFT processing in a pipelined manner.
PTL 1 discloses a Fourier transform processing device 210 including a Fourier transform mechanism 211 which performs FFT processing on inputted data. The Fourier transform mechanism 211 according to PTL 1, as shown in FIG. 13, includes a first butterfly calculation circuit 220, a complex number multiplier 221, delay elements 222 and 224, a fifth commutator 223, and a second butterfly calculation circuit 225.
The Fourier transform processing device 210 of PTL 1 further includes first and second commutators 215 and 216 which rearrange arrays of inputted data; and first and second memories 213 and 214 which store the data arrays respectively rearranged by the first and second commutators 215 and 216. The Fourier transform processing device 210 further includes second and fourth commutators 217 and 218 which rearrange the data respectively stored in the first and second memories 213 and 214.
In the Fourier transform processing device 210 according to PTL 1,the first and second commutators 215 and 216 rearrange an array of data to be inputted to the first butterfly calculation circuit 220. Accordingly, the Fourier transform processing device 210 according to PTL 1 eliminates the need for delay elements which had been required, before PTL 1 was published, to be disposed before and after a commutator preceding the first butterfly calculation circuit 220. Consequently, the Fourier transform processing device 210 according to PTL 1 can make the device smaller and reduce power consumption.
On the other hand, performance requirements for the FFT processing, such as calculation accuracy or processing throughputs, may change variously. Such change occurs, for example, when modulation schemes are changed depending on the condition of a transmission line in data communications.
A processing throughput required for digital signal processing, such as filtering, is proportional to a symbol rate. Concerning calculation accuracy required for digital signal processing, such as filtering, higher accuracy is needed for a smaller distance between symbols.
In general, calculation accuracy for a digital signal processing circuit is basically determined by the data representation format and bit-width. However, regardless of any representation format, a greater bit-width is needed for higher calculation accuracy. Accordingly, to make a circuit size and power consumption smaller, the data bit-width must be optimized to a necessary and sufficient degree depending on the required calculation accuracy.